1. Field of Invention
The present invention relates to a method of fabricating a semiconductor memory capacitor. More particularly, the present invention relates to a method of fabricating a wide-based box-structured capacitor containing hemi-spherical grains.
2. Description of Related Art
When semiconductor manufacture moves into the deep sub-micron process, the device size becomes smaller and the available space for capacitors decreases. In contrast, as the application software increases in size, the required storage capacity of the capacitor needs to be larger. Consequently, the method for fabricating the capacitor in a dynamic random access memory (DRAM) device has to be changed, in order to be compatible with the market requirement for smaller device size and larger memory size.
The capacitor is the heart for storing information in the DRAM device. As long as the capacitor stores more charges, less damaging influences are induced by noise, for example, soft errors, which are caused by .alpha. particles, can be greatly reduced during information reading; furthermore, the frequency for refresh can be reduced as well.
The storage capacity of the conventional DRAM device is small because a two-dimensional capacitor, that is, a planar type capacitor, is used in the integrated circuit manufacture process. The planar type capacitor takes quite large areas of a semiconductor substrate to store charges; therefore, it is not suitable for the design of high-integration devices. Three-dimensional capacitors are used for high-integration DRAM devices.
However, simple structures of three-dimensional capacitors nowadays can no longer satisfy the need for the memory device of higher integration. Therefore, methods for increasing surface areas of DRAM capacitors within small available spaces for capacitors have been developed. Variant structures have been used for capacitors to increase the storage capacity of the memory device, such as stacked types and trench types. Stacked type structures includes double-stacked type, fin-structured type, cylindrical type, spread-stacked type and box-structured type structures.
It is an important task for capacitors to maintain enough storage capacity in processes of semiconductor manufacture below 0.25 .mu.m. One way of increasing the storage capacity for capacitors is to increase the surface areas of capacitors. Taking crown-structured capacitors for example, hemi-spherical grains (HSG) are formed on the surfaces of lower electrodes of the crown-structured capacitors to increase the storage capacity of capacitors in processes of semiconductor manufacture below 0.18 .mu.m.
FIG. 1A to FIG. 1C are schematic, cross-sectional views illustrating the process steps of fabricating a lower electrode of a box-structured DRAM capacitor according to the prior art. Referring to FIG. 1A, source/drains 102 are formed in a substrate 100. A silicon oxide layer 104 is deposited on substrate 100, and then node contact openings 106 are formed by photolithography and etching. A doped amorphous silicon layer 110 is deposited on substrate 100 and inside openings 106 by low-pressure chemical vapor deposition (LPCVD) at about 530 degrees Centigrade.
Referring to FIG. 1B, amorphous silicon layer 110 is defined to form lower electrodes 110a.
Referring to FIG. 1C, hemi-spherical silicon grains (HSG-Si) 112 are grown on the surfaces of lower electrodes 110a, and lower electrodes 110b with larger surface areas are formed thereon. Because of the requirement for high integration, the areas for forming capacitors are limited. Within these available areas, if a distance 114 between two adjacent electrodes is too short, hemi-spherical silicon grains 112 on the surfaces of adjacent electrodes 110b contact each other and induce short circuits. On the contrary, if distance 114 is too long, then lower electrodes 110b fall down due to overly thin bases.